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The device has five reset sources. The following events generate a reset:
•
Forcing the RESET_N input pin low
•
A power-on reset condition
•
A brownout reset condition
•
Watchdog Timer reset condition
•
Clock-loss reset condition
The initial conditions after a reset are as follows:
•
I/O pins are configured as inputs with pullups (P1.0 and P1.1 are inputs, but do not have a pullup or
pulldown)
•
CPU program counter is loaded with 0x0000 and program execution starts at this address
•
All peripheral registers are initialized to their reset values (see register descriptions)
•
Watchdog Timer is disabled
•
Clock-loss detetector is disabled
During reset, the I/O pins are configured as inputs with pullups (P1.0 and P1.1 are inputs, but do not have
a pullup or pulldown). The RESET_N input is always configured as an input with pullup.
In the CC2533 and CC2541, a watchdog reset can be generated immediately in software by writing the
SRCRC.FORCE_RESET bit to 1 (see
family, a watchdog reset can be triggered from software by enabling the watchdog timer with the shortest
time-out and waiting for it to trigger.
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Topic
5.1
Power-On Reset and Brownout Detector
5.2
Clock-Loss Detector
70
Reset
Section 4.3
for the register description). In the other devices in the
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Copyright © 2009–2014, Texas Instruments Incorporated
SWRU191F – April 2009 – Revised April 2014
SWRU191F – April 2009 – Revised April 2014
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Chapter 5
Reset
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