Cc2540 Block Diagram - Texas Instruments CC253x User Manual

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RESET_N
XOSC_Q2
XOSC_Q1
P2_4
P2_3
P2_2
P2_1
P2_0
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
USB_N
USB_P
The modules can be roughly divided into one of three categories: CPU and memory related modules;
modules related to peripherals, clocks, and power management; and radio-related modules.
SWRU191F – April 2009 – Revised April 2014
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WATCHDOG
RESET
32-MHz
CRYSTAL OSC
CLOCK MUX
CALIBRATION
32.768-kHz
CRYSTAL OSC
HIGH-
DEBUG
SPEED
INTERFACE
RC-OSC
PDATA
XRAM
8051 CPU
CORE
IRAM
SFR
DMA
UNIFIED
IRQ CTRL
ANALOG COMPARATOR
OP-AMP
ENCRYPTION
DS
DECRYPTION
ADC
AUDIO/DC
USART 0
USART 1
TIMER 1 (16-Bit)
TIMER 2
(BLE LL TIMER)
TIMER 3 (8-Bit)
TIMER 4 (8-Bit)
USB
USB
PHY
Figure 1-2. CC2540 Block Diagram
Copyright © 2009–2014, Texas Instruments Incorporated
ON-CHIP VOLTAGE
TIMER REGULATOR
POWER-ON RESET
BROWN OUT
and
32-kHz
RC-OSC
POWER MANAGEMENT CONTROLLER
MEMORY
ARBITRATOR
FIFOCTRL
AES
AND
DEMODULATOR
RECEIVE
VDD (2 V–3.6 V)
DCOUPL
SLEEP TIMER
FLASH FLASH
FLASH CTRL
1 KB SRAM
RADIO REGISTERS
Link Layer Engine
MODULATOR
TRANSMIT
RF_P
RF_N
DIGITAL
ANALOG
MIXED
B0301a-055
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