Frequency And Channel Programming; Ieee 802.15.4-2006 Modulation Format - Texas Instruments CC253x User Manual

System-on-chip for 2.4ghz
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Table 23-1. Frame Filtering and Source Matching Memory Map (continued)
ADDRESS
REGISTER/VARIABLE
0x6162
0x6161
0x6160
0x615E–0x615F
0x615C–0x615D
0x615A–0x615B
0x6158–0x6159
...
0x610E–0x610F
0x610C–0x610D
0x610A–0x610B
0x6108–0x6109
0x6106–0x6107
0x6104–0x6105
0x6102–0x6103
0x6100–0x6101

23.5 Frequency and Channel Programming

The carrier frequency is set by programming the 7-bit frequency word located in FREQCTRL.FREQ[6:0].
Changes take effect after the next recalibration. Carrier frequencies in the range from 2394 MHz to 2507
MHz are supported. The carrier frequency f
MHz, and is programmable in 1-MHz steps.
IEEE 802.15.4-2006 specifies 16 channels within the 2.4-GHz band. They are numbered 11 through 26
and are 5 MHz apart. The RF frequency of channel k is given by
=
+
f
2405 5(k 11)
c
For operation in channel k, the FREQCTRL.FREQ register should therefore be set to
FREQCTRL.FREQ = 11 + 5 (k – 11).

23.6 IEEE 802.15.4-2006 Modulation Format

This section is meant as an introduction to the 2.4-GHz direct-sequence spread-spectrum (DSSS) RF
modulation format defined in IEEE 802.15.4-2006. For a complete description, see the standard document
[1].
The modulation and spreading functions are illustrated at the block level in
divided into two symbols, 4 bits each. The least-significant symbol is transmitted first. For multibyte fields,
the least-significant byte is transmitted first, except for security-related fields, where the most-significant
byte is transmitted first.
Each symbol is mapped to one out of 16 pseudorandom sequences, 32 chips each. The symbol-to-chip
mapping is shown in
significant chip (C
0
are observable on GPIO pins P1[0:5]. See
SWRU191F – April 2009 – Revised April 2014
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ENDIAN
SRCRESMASK2
SRCRESMASK1
SRCRESMASK0
SOURCE ADDRESS TABLE
short_23
LE
panid_23
LE
ext_11
short_22
LE
panid_22
LE
...
...
...
short_03
LE
panid_03
LE
ext_01
short_02
LE
panid_02
LE
short_01
LE
panid_01
LE
ext_00
short_00
LE
panid_00
LE
C
-
é
ù
Î
é
MHz
k
11, 26
ë
û
ë
Table
23-2. The chip sequence is then transmitted at 2 Mchips/s, with the least-
) transmitted first for each symbol. The transmitted bit stream and the chip sequences
Chapter 7
Copyright © 2009–2014, Texas Instruments Incorporated
24-bit mask that indicates source address match for each individual
entry in the source address table
Short address matching. When there is a match on entry panid_n +
short_n, bit n is set in SRCRESMASK.
Extended address matching. When there is a match on entry ext_n,
bits 2n and 2n + 1 are set in SRCRESMASK.
Two individual short-address entries (combination of 16-bit PAN ID
LE
and 16-bit short address) or one extended address entry
...
...
Two individual short address entries (combination of 16-bit PAN ID
LE
and 16-bit short address) or one extended address entry
Two individual short address entries (combination of 16-bit PAN ID
LE
and 16-bit short address) or one extended address entry
, in MHz, is given by f
= (2394 + FREQCTRL.FREQ[6:0])
C
Equation
ù
û
for details on how to configure the GPIO to do this.
Frequency and Channel Programming
DESCRIPTION
4.
Figure
23-1. Each byte is
CC253x Radio
(4)
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