HP 64782 User Manual page 207

Using the Emulation Analyzer
To position the trace display on screen
Emulation Analyzer Trace Signals
When you qualify states, you specify values that should be found on the
analyzer trace signals. The emulation analyzer trace signals are described in
the table that follows.
Emulation Analyzer Trace Signals
Trace Analyzer
Signals Channel #
0-23 0-23
32-47 32-47
bit 0 ch 48
bit 1 ch 49
bit 2 ch 50
bit 3 ch 51
bit 4 ch 52
bit 5 ch 53
bit 6 ch 54
bit 7 ch 55
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Signal Signal
Name Description
A0-A15 Address Lines 0-15
D0-D15 Data Lines 16-31
BACKGROUND 0 = in monitor or RESET
1 = not in monitor and not RESET
FCO These are the translation RAM derivation of the
FC1 processor function codes. If the processor has been
FC2 configured such that these are FC* signals, the
translation RAM will pass the signals directly. If the
processor has been configured such that these signals
are chip selects, one of three bus values will be driven,
based on chip select programming. If the chip select
programming does not differentiate between user and
supervisor, the FC value will be 011 BIN. If the chip
select is supervisor, the FC value will be 100 BIN. If
the chip select is user, the FC value will be 000 BIN.
R/W 0 = write bus cycle
1 = read bus cycle
SIZ0 These are processor SIZ signals, which may be
SIZ1 configured as I/O pins. If analysis status bits 15:14 are
equal to 0:0, the processor has been configured such
that these signals are SIZ.
MAPBYTE When = 0, the memory mapper has been programmed
such that the current emulation memory address is
byte wide.
When = 1, the memory mapper has been programmed
such that the current emulation memory address is
word wide.