Pci 66 Mhz Mixed Mode Topology; Pci 66 Mhz Mixed Topology; Pci 66 Mhz Mixed Mode Table - Intel 80331 Design Manual

Intel® 80331 I/O Processor Design Guide
PCI-X Layout Guidelines
Table 22. PCI 66 MHz Embedded Table (Sheet 2 of 2)
Trace Length 1 TL1: From 80331 signal Ball to first
junction
Trace Length TL2 between junctions
Trace Length TL_EM1 to TL_EM4 from junction to
embedded devices
Length Matching Requirements
Number of vias
6.4.16

PCI 66 MHz Mixed Mode Topology

Figure 31
66 MHz slots.
Figure 31.

PCI 66 MHz Mixed Topology

Table 23. PCI 66 MHz Mixed Mode Table (Sheet 1 of 2)
Parameter
Reference Plane
Breakout
Motherboard Trace Impedance (microstrip and
stripline)
62
Parameter
and Table 23 provide routing details for a topology with embedded devices and PCI
Routing Guideline Lower AD Bus
Route over an unbroken ground plane
5 mils on 5 mils spacing. Maximum length of the breakout is 500 mils.
50 Ohms +/- 15%
Routing Guideline for AD Bus
5.0" maximum
0.5" minimum - 3.5" maximum
2.0" minimum - 3.0" maximum
No length matching is required among datalines. For
length matching for clocks, refer clock guidelines
Table 8.
Four vias maximum
EM1
TL1
EM2
AD1
CONN1
Routing Guideline Upper AD Bus