Intel 80331 Design Manual page 90

Intel® 80331 I/O Processor Design Guide
Memory Controller
Table 46. DDR 333 Embedded Source Synchronous Routing Recommendations (Sheet 2 of 2)
Parallel Termination
Routing Guideline 1
Routing Guideline 2: Vias
90
Parameter Routing Guideline
51 ohms +/- 5%
• Place the VTT terminations in VTT island after the
DIMM (trace length of 0.15" to 0.5").
or
• Split termination of 100 ohms +/- 5% to 2.5 V and
100 ohms +/- 5% to ground
Route all data signals and their associated strobes on
the same layer.
< 2 Minimize layer changes especially DQS signals.
(two vias or less). Equal number of vias between DQ
and its respective DQS signal.