Intel 80331 Design Manual page 25

I/o processor
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Table 3.
Terminations: Pull-up/Pull-down (Sheet 3 of 4)
Signal
S_RCOMP
SCLKIN
S_REQ[3:0]#
S_PCIXCAP
PRIVMEM
PRIVDEV
P_RCOMP
P_REQ#
P_LOCK#
P_SERR#
P_TRDY#
P_PERR#
P_DEVSEL#
P_FRAME#
P_STOP#
P_IRDY#
P_AD[63:32]
P_C/BE[7:4]
P_PAR64
P_REQ64#
P_ACK64#
Pull-up or Pull-down
Resistor Value (in Ohms)
100 ohm +/- 1% to GND
Through 33.2ohm resistor
to S_CLKOUT
Refer to comments
Refer to comments
1.5 K pull-down when
needed (refer to comments)
1.5 K pull-down when
needed (refer to comments)
100 ohm +/- 1% to GND
Refer to comments
Refer to comments
Refer to comments
Refer to comments
Refer to comments
Refer to comments
Refer to comments
Refer to comments
Refer to comments
Refer to comments
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Refer to comments
Intel® 80331 I/O Processor Design Guide
• When PCIODT_EN = 1 no external pull-up needed
• When PCIODT_EN = 0, then 8.2 K pull-up is required.
66 MHz PCI: connect pin to GND.
66 MHz PCI-X: use 0.01 µF to GND || 10 K resistor to GND.
100 MHz PCI-X: use 0.01 µF to GND.
133 MHz PCI-X: use 0.01 µF to GND.
Private Memory Enable: PRIVMEM latched at rising (deasserting)
edge of P_RST# and determines when the 80331 operates with
Private Memory Space on the secondary PCI bus of the PCI-to-PCI
Bridge.
0 = Normal addressing mode. Requires pull-down resistor.
1 = Private Addressing enable in PCI-to-PCI Bridge. (Default mode)
Muxed onto signal A[1],
Private Device Enable: PRIVDEV latched at rising (deasserting)
edge of P_RST# and determines when the 80331 operates with
Private Device enabled on the secondary PCI bus of the PCI-to-PCI
Bridge.
0 = All Secondary PCI devices are accessible to Primary PCI
configuration cycles. (Requires pull-down resistor).
1 = Private Devices enabled in PCI-to-PCI Bridge. (Default mode)
Muxed onto signal A[0]
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
8.2 K pull-up is required when not already pulled up on the PCI bus.
An add-in card may rely on the motherboard to pull-up this signal.
Terminations
Comments
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25

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