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80331
Design manual
Ddr 333 Dimm Unbuffered/Registered Address/Cmd Topology Lengths - Intel 80331 Design Manual
I/o processor
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Intel® 80331 I/O Processor Design Guide
Memory Controller
Figure 43.
DDR 333 DIMM Unbuffered/Registered Address/CMD Topology Lengths
VTT (1.25 V)
51 ohms
+/- 5%
TL1
TL2
TL3
DIMM
87
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