Dimm Dq/Dqs Split Termination Topology; Dimm Dq/Dqs Split Termination Topology Lengths - Intel 80331 Design Manual

I/o processor
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Intel® 80331 I/O Processor Design Guide
Memory Controller
Table 38.

DIMM DQ/DQS Split Termination Topology Lengths

Traces
Description
Microstrip/
TL1
Breakout
Stripline
TL2
Lead-in
Microstrip
TL3
Microstrip
TL4
Vtt
Microstrip
Figure 39.

DIMM DQ/DQS Split Termination Topology

80
Minimum
Maximum
Layer
Length
Length
0.5"
2 "
8"
0.25"
0.5"
0.15
0.5"
TL1
TL2
Trace
Spacing
Impedance
5 mils
45 ohms +/- 15%
or
12 mils
50 ohms +/- 15%
Same as TL2
5 mils
TL3
22 ohms +/- 5%
DIMM
Notes
Lead-in traces are preferred as
striplines.
Fan out for series termination
Split termination
2.5V
100 ohms
+/- 5%
TL4
100 ohms
+/- 5%
GND

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