Memory Controller; Ddr Bias Voltages; Ddr Ii Bias Voltage - Intel 80331 Design Manual

Memory Controller

The Memory Controller allows direct control of a DDR SDRAM memory subsystem. It features
programmable chip selects and support for error correction codes (ECC). The memory controller can
be configured for DDR SDRAM at 333 MHz and DDR-II at 400MHz. The memory controller
supports pipelined access and arbitration control to maximize performance. The memory controller
interface configuration support includes Unbuffered DIMMs, Registered DIMMs, and discrete DDR
SDRAM devices.
External memory can be configured as host addressable memory or private 80331memory utilizing
the Address Translation Unit and Bridge.
7.1

DDR Bias Voltages

The 80331 supports 2.5 V DDR memory and 1.8V for DDRII.
minimum/maximum values for the DDR memory bias voltages and
minimum/maximum values for the DDR II memory bias voltages.
Table 27.

DDR Bias Voltages

Symbol
V 2.5 V Power balls to be connected to a 2.5 V power board plane.
CC25
V I/O Supply Voltage
DDQ
V Memory I/O Reference Voltage
REF
V DDR Memory I/O Termination Voltage
TT
Table 28.

DDR II Bias Voltage

Symbol
V 1.8 V Power balls to be connected to the 1.8 V power board plane.
CC18
V I/O Supply Voltage
DDQ
V Memory I/O Reference Voltage
REF
V DDR Memory I/O Termination Voltage
TT
Parameter
Parameter
Intel® 80331 I/O Processor Design Guide
Table 27 lists the
Table 28
Minimum
2.3
2.3
V /2 - 0.05 V
CC25
V - 0.04
REF
Minimum
1.7
1.7
V /2 - 0.05 V
CC/18 CC/18
V - 0.04
REF
Memory Controller
7
lists the
Maximum Units
2.7 V
2.7 V
/2 + 0.05 V
CC25
V + 0.04 V
REF
Maximum Units
1.9 V
1.9 V
/2 + 0.05 V
V + 0.04 V
REF
67