Embedded Ddr 333 Registered Addr/Cmd Topology - Intel 80331 Design Manual

Intel® 80331 I/O Processor Design Guide
Memory Controller
Figure 48.

Embedded DDR 333 Registered ADDR/CMD Topology

100
TL1 TL10
TL9
VTT (1.25 V)
51 ohms
+/- 5%
TL11
TL3
TL2
Register
TL3
TL7
SDRAM Pin
TL6
TL7
SDRAM Pin
TL4
TL5
TL7
SDRAM Pin
TL6
TL7
SDRAM Pin
TL8
SDRAM Pin
TL7
SDRAM Pin
TL6
TL7
SDRAM Pin
TL5
TL4
TL7
SDRAM Pin
TL6
TL7
SDRAM Pin