I/O Memory Areas - Omron CP1E CPU UNIT SOFTWARE User Manual

5 I/O Memory
5-1-3

I/O Memory Areas

Name
CIO Area Input Bits
Output Bits
Serial PLC
Link Words
Work Area (W)
Holding Area (H)
Data Memory E-type CPU
Area (D) Unit
N/NA-type
CPU Unit
Timer Area (T) Present values
Timer Comple-
tion Flags
Counter Area (C) Present values
Counter Com-
pletion Flags
Auxiliary Area Read only
(A)
Read-write
5-6
No. of bits Word addresses
1,600 bits CIO 0 to CIO 99
(100 words)
1,600 bits CIO 100 to CIO 199
(100 words)
1,440 bits CIO 200 to CIO 289
(90 words)
1,600 bits W0 to W99
(100 words)
800 bits (50 words) H0 to H49
2K words D0 to D2047
8K words D0 to D8191
256 T0 to T255
256
256 C0 to C255
256
7,168 bits A0 to A447
(448 words)
4,896 bits A448 to A753
(306 words)
Remarks
−
Refer to 5-2 I/O Bits.
−
−
Refer to Section 14 Serial
Communications.
−
Refer to 5-3 Work Area
(W).
The data is unstable if Refer to 5-4 Holding Area
power is interrupted, when (H).
the battery is not mounted.
Data in specified words of Refer to 5-5 Data Memory
the DM Area can be Area (D).
retained in the built-in
EEPROM in the backup
memory by using a bit in
the Auxiliary Area. Applica-
ble words: D0 to D1499
(One word can be speci-
fied at a time.)
Data in specified words of
the DM Area can be
retained in the built-in
EEPROM in the backup
memory by using a bit in
the Auxiliary Area.Applica-
ble words: D0 to D6999
(One word can be speci-
fied at a time.)
−
Refer to 5-6 Timer Area
(T).
The data is unstable if Refer to 5-7 Counter Area
power is interrupted, when (C).
the battery is not mounted.
−
The data is unstable if Refer to A-2 Auxiliary Area
power is interrupted, when Allocations by Address.
the battery is not mounted.
CP1E CPU Unit Software User's Manual(W480)
Reference