Omron CP1E CPU UNIT SOFTWARE User Manual page 82

5 I/O Memory
Timer PV Refresh Method
Timer num-
bers
T0 to T255
Precautions for Correct Use Precautions for Correct Use
It is not recommended to use the same timers number in two timer instructions because the tim-
ers will not operate correctly if they are operating simultaneously.
Do not use the same timer number for more than one instruction.
If two or more timer instructions use the same timer number, an error will be generated during
the program check.
Resetting or Maintaining Timers
• Timer Completion Flags can be force-set and force-reset.
• Timer PVs cannot be force-set or force-reset, although the PVs can be refreshed indirectly by
force-setting/resetting the Completion Flag.
• There are no restrictions in the order of using timer numbers or in the number of N.C. or N.O. con-
ditions that can be programmed.
• Timer PVs can be read as word data and used in programming.
• The following table shows when timers will be reset or maintained.
Instruction
When the operating mode is
changed between PROGRAM or
MONITOR mode and RUN mode
When the PLC power is reset
CNR/CNRX instructions
(timer/counter reset)
Jumps (JMP-JME)
Interlocks (IL-ILC) with OFF inter-
lock conditions
*1 If the IOM Hold Bit (A500.12) is ON, the PV and Completion Flag will be retained when a fatal error occurs
(including execution of FALS instructions) or the operating mode is changed from PROGRAM mode to
RUN or MONITOR mode or vice-versa. (The PV and Completion Flag will be cleared when power is
cycled.)
*2 Since the TIML/TIMLX instructions do not use timer numbers, they are reset under different conditions.
The PV for a TIML/TIMLX instruction is reset to the SV.
Refer to the descriptions of these instructions for details.
5-14
The timer PV is refreshed when the instruction is executed. This can cause a delay depending
on the cycle time.
• When the cycle time is longer than 100 ms, delay is generated by the TIM/TIMX instruction.
• When the cycle time is longer than 10 ms, delay is generated by the TIMH/TIMHX instruction.
• When the cycle time is longer than 1 ms, delay is generated by the TMHH/TMHHX instruction.
HUNDRED-MS
PV=0
Flag=OFF
*1
PV=0
Flag=OFF
PV= 9999/FFFF
*2
Flag=OFF
Retained
Reset (PV = SV, Timer Completion Flag = OFF)
Timer PV refresh method
TIM/TIMX TIMH/TIMHX
TEN-MS TIMER
TIMER
CP1E CPU Unit Software User's Manual(W480)
TMHH/ TTIM/
TMHHX TTIMX
ACCUMULA
ONE-MS TIMER
TIVE TIMER
Retained