Omron CP1E CPU UNIT SOFTWARE User Manual page 144

11 High-speed Counters
Wiring Example for High-speed Counter Input Terminals
Using a 24-VDC Open-collector Encoder
The following example shows the connections of an encoder with phase-A, phase-B, and phase-Z
inputs to high-speed counter 0.
Encoder
(power supply: 24 VDC)
Example: E6B2-CWZ6C
NPN open-collector output
Power provided
Encoder
Writing the Ladder Program
Execution
Generating interrupts for the
high-speed counter PV (num-
ber of pulses) and perform
high-speed processing.
Reading the high-speed
counter PV (number of
pulses).
Reading the high-speed
counter frequency (speed).
11-6
CP1E CPU Unit
(Differential Phase Input Mode)
Black Phase A
0.00
(High-speed counter 0: Phase A 0 V)
White Phase B
0.01
(High-speed counter 0: Phase B 0 V)
Orange Phase Z
0.04
(High-speed counter 0: Phase Z 0 V)
Brown+Vcc
COM (COM 24V)
Blue 0V(COM)
24 VDC power supply
0V
+24V
(Do not use the same I/O power supply as other equipment.)
1
0V Power supply
24V 0V
2
Shielded twisted-pair cable
I
A
Phase A
I
B
Phase B
I
Z
Phase Z
Program
Specify interrupt tasks with CTBL
instructions.
Read the high-speed counter PV from
the Auxiliary Area and convert it to
position or length data using instruc-
tions or measure the length using con-
mparison instructions such as =, >,
and <.
Execute a PRV instruction.
CP1E CPU Unit
0.00
0.01
0.04
COM
Reference
11-3 High-speed
Counter Interrupts
11-2-4 Reading the
Present Value
11-2-5 Frequency
Measurement
CP1E CPU Unit Software User's Manual(W480)