Low Level Detect; High Level Detect - HindlePower ATevo Series Operations

Float battery charger phase input–group ii (30-100 adc output)
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7.3.

7.3. Low Level Detect

Low Level Detect
ATevo has a Low Level Detect feature similar to the Low Level Detect feature in legacy ATevo
chargers. This feature is a dedicated hardware circuit that detects if the dc bus voltage is below
a configurable set point. If so, the Low Level Detect circuit will force the Common Alarm Relay
to the alarmed state.
The Low Level Detect circuit functions independently of the microprocessor. It will trigger the
Common Alarm if a catastrophic microprocessor failure should occur to indicate that the dc bus
voltage is critically low and immediate attention is required. The circuit includes a dedicated
Analog Low Level alarm LED that illuminates if the Low Level Detect condition is triggered.
The Analog Low Level alarm LED is on the back of the Main Control Board (A1). You will need to
open ATevo's door to view the Analog Low Voltage Alarm LED.
See
Section 6.3
for instructions on how to configure the threshold for the Low Level Detect
feature.
7.4.

7.4. High Level Detect

High Level Detect
ATevo High Level Detect has a dedicated hardware circuit that detects if the dc bus voltage is
above a configurable set point. If the dc voltage rises above the set point threshold for more
than 30 seconds, the circuit disables the output drivers (rectifier controllers) and forces the
Common Alarm Relay to the active state.
The High Level Detect is a true failsafe feature in that it can shut down the charger by disabling
the rectifier control signals. This
circuit works independent of the microprocessor and will override the rectifier control. The High
Level Detect will shut down the charger output circuitry should a catastrophic microprocessor
failure occur, turning the rectifier to the full on condition.
If the High Level Detect shutdown occurs, the circuit latches until the charger is restarted by
Copyright HindlePower Inc. 2021
ATevo Operations–Single Phase Input–Group II (30-100 Adc Output) - 1_en
Last modified: 5 March 2021
Page 74 of 171

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