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DBEQ
(Counter) – 1 ⇒ Counter
Operation:
If (Counter) = 0, then (PC) + $0003 + Rel ⇒ PC,
Description:
Subtract one from the specified counter register A, B, D, X, Y, or SP. If
the counter register has reached zero, execute a branch to the specified
relative destination. The DBEQ instruction is encoded into three bytes of
machine code including the 9-bit relative offset (–256 to +255 locations
from the start of the next instruction).
IBEQ and TBEQ instructions are similar to DBEQ except that the counter
is incremented or tested rather than being decremented. Bits 7 and 6 of
the instruction postbyte are used to determine which operation is to be
performed.
Condition Codes and Boolean Formulas:
S
–
None affected.
Addressing Modes, Machine Code, and Execution Times:
Source Form
DBEQ abdxys, rel9
Notes:
1. Encoding for lb is summarized in the following table. Bit 3 is not used (don't care), bit 5 selects branch on zero
(DBEQ – 0) or not zero (DBNE – 1) versions, and bit 4 is the sign bit of the 9-bit relative offset. Bits 7 and 6 would
be 0:0 for DBEQ.
Count
Bits 2:0
Register
A
000
B
001
D
100
X
101
Y
110
SP
111
MOTOROLA
6-70
Decrement and Branch if Equal to Zero
X
H
I
N
Z
–
–
–
–
–
Address Mode
REL
04 lb rr
Source Form
DBEQ A, rel9
04 00 rr
DBEQ B, rel9
04 01 rr
DBEQ D, rel9
04 04 rr
DBEQ X, rel9
04 05 rr
DBEQ Y, rel9
04 06 rr
DBEQ SP, rel9
04 07 rr
INSTRUCTION GLOSSARY
V
C
–
–
1
Object Code
Object Code
(if offset is positive)
04 10 rr
04 11 rr
04 14 rr
04 15 rr
04 16 rr
04 17 rr
DBEQ
Cycles
Access Detail
3/3
PPP
Object Code
(if offset is negative)
CPU12
REFERENCE MANUAL
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