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10.2 CALL and Return from Call Instructions
The CALL is similar to a JSR instruction, but the subroutine that is called can be locat-
ed anywhere in the normal 64-Kbyte address space, or on any page of program ex-
pansion memory. When CALL is executed, a return address is calculated, then it and
the current program page register value are stacked, and a new instruction-supplied
value is written to PPAGE. The PPAGE value controls which of the 256 possible pages
is visible through the 16-Kbyte window in the 64-Kbyte memory map. Execution con-
tinues at the address of the called subroutine.
The actual sequence of operations that occur during execution of CALL is:
•
The CPU reads the old PPAGE value into an internal temporary register, and
writes the new instruction-supplied PPAGE value to PPAGE. This switches the
destination page into the program overlay window.
•
The CPU calculates the address of the next instruction after the CALL instruc-
tion (the return address), and pushes this 16-bit value onto the stack.
•
The old 8-bit PPAGE value is pushed onto the stack.
•
The effective address of the subroutine is calculated, the queue is refilled, and
execution begins at the new address.
This sequence of operations is an uninterruptable CPU instruction. There is no need
to inhibit interrupts during CALL execution. In addition, a CALL can be performed from
any address in memory to any other address. This is a big improvement over other
bank-switching schemes, where the page switch operation can only be performed by
a program outside the overlay window.
For all practical purposes, the PPAGE value supplied by the instruction can be consid-
ered to be part of the effective address. For all addressing mode variations except in-
dexed indirect modes, the new page value is provided by an immediate operand in the
instruction. For indexed indirect variations of CALL, a pointer specifies memory loca-
tions where the new page value and the address of the called subroutine are stored.
Use of indirect addressing for both the new page value and the address within the
page allows use run-time calculated values rather than immediate values that must be
known at the time of assembly.
The RTC instruction is used to terminate subroutines invoked by a CALL instruction.
RTC unstacks the PPAGE value and the return address, the queue is refilled, and ex-
ecution resumes with the next instruction after the corresponding CALL.
The actual sequence of operations that occur during execution of RTC is:
•
The return value of the 8-bit PPAGE register is pulled from the stack.
•
The 16-bit return address is pulled from the stack and loaded into the PC.
•
The return PPAGE value is written to the PPAGE register.
•
The queue is refilled, and execution begins at the new address.
Since the return operation is implemented as a single uninterruptable CPU instruction,
the RTC can be executed from anywhere in memory, including from a different page
of extended memory in the overlay window.
CPU12
REFERENCE MANUAL
MEMORY EXPANSION
MOTOROLA
10-3
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