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Table A-1 Instruction Set Summary (Continued)
Source
Form
(D) – (M:M+1) ⇒ D
SUBD opr
Subtract Memory from D (A:B)
(SP) – 2 ⇒ SP;
SWI
RTN
:RTN
H
(SP) – 2 ⇒ SP; (Y
(SP) – 2 ⇒ SP; (X
(SP) – 2 ⇒ SP; (B:A) ⇒ M
(SP) – 1 ⇒ SP; (CCR) ⇒ M
1 ⇒ I; (SWI Vector) ⇒ PC
Software Interrupt
(A) ⇒ B
TAB
Transfer A to B
(A) ⇒ CCR
TAP
Translates to TFR A , CCR
(B) ⇒ A
TBA
Transfer B to A
TBEQ cntr , rel
If (cntr) = 0, then Branch;
else Continue to next instruction
Test Counter and Branch if Zero
(cntr = A, B, D, X,Y, or SP)
(M) + [(B) × ((M+1) – (M))] ⇒ A
TBL opr
8-Bit Table Lookup and Interpolate
Initialize B, and index before TBL.
<ea> points at first 8-bit table entry (M) and
B is fractional part of lookup value.
(no indirect addressing modes allowed.)
TBNE cntr , rel
If (cntr) not = 0, then Branch;
else Continue to next instruction
Test Counter and Branch if Not Zero
(cntr = A, B, D, X,Y, or SP)
(r1) ⇒ r2 or
TFR r1, r2
$00:(r1) ⇒ r2 or
(r1[7:0]) ⇒ r2
Transfer Register to Register
r1 and r2 may be A, B, CCR, D, X, Y, or SP
(CCR) ⇒ A
TPA
Translates to TFR CCR , A
CPU12
REFERENCE MANUAL
Operation
⇒ M
:M
;
L
(SP)
(SP+1)
) ⇒ M
:Y
:M
;
H
L
(SP)
(SP+1)
) ⇒ M
:X
:M
;
H
L
(SP)
(SP+1)
:M
;
(SP)
(SP+1)
(SP)
INSTRUCTION REFERENCE
Addr.
Machine
Mode
Coding (hex)
IMM
83 jj kk
DIR
93 dd
EXT
B3 hh ll
IDX
A3 xb
IDX1
A3 xb ff
IDX2
A3 xb ee ff
[D,IDX]
A3 xb
[IDX2]
A3 xb ee ff
INH
3F
INH
18 0E
INH
B7 02
INH
18 0F
REL
04 lb rr
(9-bit)
IDX
18 3D xb
REL
04 lb rr
(9-bit)
INH
B7 eb
INH
B7 20
*
~
S X H I N Z V C
– – ∆
∆ ∆
2
–
–
3
3
3
3
4
6
6
9
–
–
– 1 –
–
–
– – ∆
∆
2
–
–
0
∆
⇓
∆ ∆ ∆
∆ ∆
1
– – ∆
∆
2
–
–
0
3
–
–
– – –
–
–
– – ∆
∆
8
–
–
–
3
–
–
– – –
–
–
1
–
–
–
–
–
–
–
or
∆
⇓
∆
∆
∆
∆
∆
1
–
–
– – –
–
–
MOTOROLA
A-17
∆
–
–
∆
–
–
?
–
–
∆
–
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