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LSRD
Operation:
0
Description:
Shifts all bits of double accumulator D one place to the right. D15 (MSB
of A) is loaded with zero. The C status bit is loaded from D0 (LSB of B).
Condition Codes and Boolean Formulas:
S
–
N:
Z:
V:
C:
Addressing Modes, Machine Code, and Execution Times:
Source Form
LSRD
MOTOROLA
6-138
Logical Shift Right Double
b7
– – – – – –
A
X
H
I
N
Z
∆
–
–
–
0
0; Cleared.
Set if result is $0000; cleared otherwise.
D0
Set if, after the shift operation, C is set; cleared otherwise.
D0
Set if the LSB of D was set before the shift; cleared otherwise.
Address Mode
INH
INSTRUCTION GLOSSARY
b7
b0
– – – – – –
B
V
C
∆
∆
Object Code
49
LSRD
C
b0
Cycles
Access Detail
1
O
CPU12
REFERENCE MANUAL
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