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BRN
(PC) + $0002 ⇒ PC
Operation:
Description:
Never branches. BRN is effectively a 2-byte NOP that requires one cycle
to execute. BRN is included in the instruction set to provide a comple-
ment to the BRA instruction. The instruction is useful during program de-
bug, to negate the effect of another branch instruction without disturbing
the offset byte. A complement for BRA is also useful in compiler imple-
mentations.
Execution time is longer when a conditional branch is taken than when
it is not, because the instruction queue must be refilled before execution
resumes at the new address. Since the BRN branch condition is never
satisfied, the branch is never taken, and only a single program fetch is
needed to update the instruction queue.
See
Condition Codes and Boolean Formulas:
S
–
None affected.
Addressing Modes, Machine Code, and Execution Times:
Source Form
BRN rel8
MOTOROLA
6-46
Branch Never
3.7 Relative Addressing Mode
X
H
I
N
Z
–
–
–
–
–
Address Mode
REL
INSTRUCTION GLOSSARY
for details of branch execution.
V
C
–
–
Object Code
21 rr
BRN
Cycles
Access Detail
1
P
CPU12
REFERENCE MANUAL
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