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LBRN
(PC) + $0004 ⇒ PC
Operation:
Description:
Never branches. LBRN is effectively a 4-byte NOP that requires three
cycles to execute. LBRN is included in the instruction set to provide a
complement to the LBRA instruction. The instruction is useful during pro-
gram debug, to negate the effect of another branch instruction without
disturbing the offset byte. A complement for LBRA is also useful in com-
piler implementations.
Execution time is longer when a conditional branch is taken than when
it is not, because the instruction queue must be refilled before execution
resumes at the new address. Since the LBRN branch condition is never
satisfied, the branch is never taken, and the queue does not need to be
refilled, so execution time is always the smaller value.
Condition Codes and Boolean Formulas:
S
–
None affected.
Addressing Modes, Machine Code, and Execution Times:
Source Form
LBRN rel16
CPU12
REFERENCE MANUAL
Long Branch Never
X
H
I
N
Z
–
–
–
–
–
Address Mode
REL
18 21 qq rr
INSTRUCTION GLOSSARY
V
C
–
–
Object Code
LBRN
Cycles
Access Detail
3
OPO
MOTOROLA
6-119
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