Motorola HC12 Refrence Manual page 342

Table of Contents

Advertisement

Table A-1 Instruction Set Summary (Continued)
Source
Form
BHS rel
Branch if Higher or Same
(if C = 0) (unsigned)
same function as BCC
(A) • (M)
BITA opr
Logical And A with Memory
(B) • (M)
BITB opr
Logical And B with Memory
BLE rel
Branch if Less Than or Equal
(N ⊕ V) = 1) (signed)
(if Z
BLO rel
Branch if Lower
(if C = 1) (unsigned)
same function as BCS
BLS rel
Branch if Lower or Same
(if C
Z = 1) (unsigned)
BLT rel
Branch if Less Than
(if N ⊕ V = 1) (signed)
BMI rel
Branch if Minus (if N = 1)
BNE rel
Branch if Not Equal (if Z = 0)
BPL rel
Branch if Plus (if N = 0)
BRA rel
Branch Always (if 1 = 1)
Branch if (M) • (mm) = 0
BRCLR
opr , msk , rel
(if All Selected Bit(s) Clear)
BRN rel
Branch Never (if 1 = 0)
Branch if (M) • (mm) = 0
BRSET
opr , msk , rel
(if All Selected Bit(s) Set)
(mm) ⇒ M
BSET opr , msk
(M)
Set Bit(s) in Memory
(SP) – 2 ⇒ SP;
BSR rel
RTN
:RTN
H
Subroutine address ⇒ PC
Branch to Subroutine
MOTOROLA
A-4
Operation
⇒ M
:M
L
(SP)
(SP+1)
INSTRUCTION REFERENCE
Addr.
Machine
Mode
Coding (hex)
REL
24 rr
3/1
IMM
85 ii
DIR
95 dd
EXT
B5 hh ll
IDX
A5 xb
IDX1
A5 xb ff
IDX2
A5 xb ee ff
[D,IDX]
A5 xb
[IDX2]
A5 xb ee ff
IMM
C5 ii
DIR
D5 dd
EXT
F5 hh ll
IDX
E5 xb
IDX1
E5 xb ff
IDX2
E5 xb ee ff
[D,IDX]
E5 xb
[IDX2]
E5 xb ee ff
REL
2F rr
3/1
REL
25 rr
3/1
REL
23 rr
3/1
REL
2D rr
3/1
REL
2B rr
3/1
REL
26 rr
3/1
REL
2A rr
3/1
REL
20 rr
DIR
4F dd mm rr
EXT
1F hh ll mm rr
IDX
0F xb mm rr
IDX1
0F xb ff mm rr
IDX2
0F xb ee ff mm rr
REL
21 rr
DIR
4E dd mm rr
EXT
1E hh ll mm rr
IDX
0E xb mm rr
IDX1
0E xb ff mm rr
IDX2
0E xb ee ff mm rr
DIR
4C dd mm
EXT
1C hh ll mm
IDX
0C xb mm
IDX1
0C xb ff mm
IDX2
0C xb ee ff mm
REL
07 rr
*
~
S X H I N Z V C
– – –
– – ∆
1
0
3
3
3
3
4
6
6
– – ∆
1
0
3
3
3
3
4
6
6
– – –
– – –
– – –
– – –
– – –
– – –
– – –
3
– – –
4
– – –
5
4
6
8
1
– – –
4
– – –
5
4
6
8
– – ∆
4
0
4
4
4
6
4
– – –
CPU12
REFERENCE MANUAL

Advertisement

Table of Contents
loading

This manual is also suitable for:

Cpu12

Table of Contents