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TAP
(A) ⇒ CCR
Operation:
Description:
Transfers the logic states of bits [7:0] of accumulator A to the corre-
sponding bit positions of the CCR. The content of A remains unchanged.
The X mask bit can be cleared as a result of a TAP, but cannot be set if
it was cleared prior to execution of the TAP. If the I bit is cleared, there
is a one cycle delay before the system allows interrupt requests. This
prevents interrupts from occurring between instructions in the sequenc-
es CLI, WAI and CLI, SEI.
This instruction is accomplished with the TFR A,CCR instruction. For
compatibility with the M68HC11, the mnemonic TAP is translated by the
assembler.
Condition Codes and Boolean Formulas:
S
∆
Condition codes take on the value of the corresponding bit of accumu-
lator A, except that the X mask bit cannot change from zero to one.
Software can leave the X bit set, leave it cleared, or change it from one
to zero, but it can only be set by a reset or by recognition of an XIRQ
interrupt.
Addressing Modes, Machine Code, and Execution Times:
Source Form
TAP translates to...
TFR A,CCR
MOTOROLA
6-198
Transfer from Accumulator A
to Condition Code Register
X
H
I
N
Z
⇓
∆
∆
∆
∆
Address Mode
INH
B7 02
INSTRUCTION GLOSSARY
V
C
∆
∆
Object Code
TAP
Cycles
Access Detail
1
P
CPU12
REFERENCE MANUAL
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