B.7 Additional Functions - Motorola HC12 Refrence Manual

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Arithmetic on index pointers is another example. The M68HC11 usually requires that
the content of the index register be moved into accumulator D, where calculations are
performed, then back to the index register before indexing can take place. In the
CPU12, the LEAS, LEAX, and LEAY instructions perform arithmetic operations direct-
ly on the index pointers. The pre-/post-increment/decrement variations of indexed ad-
dressing also allow index modification to be incorporated into an existing indexed
instruction rather than performing the index modification as a separate operation.
Transfer and exchange operations often allow register contents to be temporarily
saved in another register rather than having to save the contents in memory. Some
CPU12 instructions such as MIN and MAX combine the actions of several M68HC11
instructions into a single operation.

B.7 Additional Functions

The CPU12 incorporates a number of new instructions that provide added functional-
ity and code efficiency. Among other capabilities, these new instructions allow effi-
cient processing for fuzzy logic applications and support subroutine processing in
extended memory beyond the standard 64-Kbyte address map for M68HC12 devices
incorporating this feature.
quent paragraphs discuss significant enhancements.
Mnemonic
Addressing Modes
ANDCC
Immediate
BCLR
BGND
BRCLR
BRSET
BSET
CALL
Extended, Indexed
Immediate, Direct,
CPS
Extended, and Indexed
DBNE
DBEQ
EDIV
EDIVS
EMACS
EMAXD
EMAXM
EMIND
EMINM
EMUL
EMULS
ETBL
EXG
IBEQ
IBNE
IDIVS
CPU12
REFERENCE MANUAL
Table B-4
Table B-4 New M68HC12 Instructions
AND CCR with Mask (replaces CLC, CLI, and CLV)
Extended
Bit(s) Clear (added extended mode)
Inherent
Enter Background Debug Mode, if enabled
Extended
Branch if Bit(s) Clear (added extended mode)
Extended
Branch if Bit(s) Set (added extended mode)
Extended
Bit(s) Set (added extended mode)
Similar to JSR Except also Stacks PPAGE Value
With RTC instruction, allows easy access to >64-Kbyte space
Compare Stack Pointer
Relative
Decrement and Branch if Equal to Zero (Looping Primitive)
Relative
Decrement and Branch if Not Equal to Zero (Looping Primitive)
Inherent
Extended Divide Y:D/X = Y(Q) and D(R) (Unsigned)
Inherent
Extended Divide Y:D/X = Y(Q) and D(R) (Signed)
Multiply and Accumulate 16 × 16 ⇒ 32 (Signed)
Special
Indexed
Maximum of Two Unsigned 16-Bit Values
Indexed
Maximum of Two Unsigned 16-Bit Values
Indexed
Minimum of Two Unsigned 16-Bit Values
Indexed
Minimum of Two Unsigned 16-Bit Values
Extended Multiply 16 × 16 ⇒ 32; M(idx) ∗ D ⇒ Y:D
Special
Extended Multiply 16 × 16 ⇒ 32 (signed); M(idx) ∗ D ⇒ Y:D
Special
Special
Table Lookup and Interpolate (16-bit entries)
Inherent
Exchange Register Contents
Relative
Increment and Branch if Equal to Zero (Looping Primitive)
Relative
Increment and Branch if Not Equal to Zero (Looping Primitive)
Signed Integer Divide D/X ⇒ X(Q) and D(R) (Signed)
Inherent
M68HC11 TO M68HC12 UPGRADE PATH
is a summary of these new instructions. Subse-
Brief Functional Description
MOTOROLA
B-11

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