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ANDCC
Operation:
(CCR)
Description:
Performs bitwise logical AND between the content of a mask operand
and the content of the CCR. The result is placed in the CCR. After the
operation is performed, each bit of the CCR is the result of a logical AND
with the corresponding bits of the mask. To clear CCR bits, clear the cor-
responding mask bits. CCR bits that correspond to ones in the mask are
not changed by the ANDCC operation.
If the I mask bit is cleared, there is a one cycle delay before the system
allows interrupt requests. This prevents interrupts from occurring be-
tween instructions in the sequences CLI, WAI and CLI, SEI (CLI is equiv-
alent to ANDCC #$EF).
Condition Codes and Boolean Formulas:
S
⇓
Condition code bits are cleared if the corresponding bit was zero before
the operation or if the corresponding bit in the mask is zero.
Addressing Modes, Machine Code, and Execution Times:
Source Form
ANDCC # opr8i
MOTOROLA
6-18
Logical AND CCR with Mask
•
(Mask) ⇒ CCR
X
H
I
N
Z
⇓
⇓
⇓
⇓
⇓
Address Mode
IMM
10 ii
INSTRUCTION GLOSSARY
V
C
⇓
⇓
Object Code
ANDCC
Cycles
Access Detail
1
P
CPU12
REFERENCE MANUAL
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