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DBNE
(Counter) – 1 ⇒ Counter
Operation:
If (Counter) not = 0, then (PC) + $0003 + Rel ⇒ PC,
Description:
Subtract one from the specified counter register A, B, D, X, Y, or SP. If
the counter register has not been decremented to zero, execute a
branch to the specified relative destination. The DBNE instruction is en-
coded into three bytes of machine code including a 9-bit relative offset
(–256 to +255 locations from the start of the next instruction).
IBNE and TBNE instructions are similar to DBNE except that the counter
is incremented or tested rather than being decremented. Bits 7 and 6 of
the instruction postbyte are used to determine which operation is to be
performed.
Condition Codes and Boolean Formulas:
S
–
None affected.
Addressing Modes, Machine Code, and Execution Times:
Source Form
DBNE abdxys, rel9
Notes:
1. Encoding for lb is summarized in the following table. Bit 3 is not used (don't care), bit 5 selects branch on zero
(DBEQ – 0) or not zero (DBNE – 1) versions, and bit 4 is the sign bit of the 9-bit relative offset. Bits 7 and 6 would
be 0:0 for DBNE.
Count
Bits 2:0
Register
A
000
B
001
D
100
X
101
Y
110
SP
111
CPU12
REFERENCE MANUAL
Decrement and Branch if Not Equal to Zero
X
H
I
N
Z
–
–
–
–
–
Address Mode
REL
Source Form
DBNE A, rel9
DBNE B, rel9
DBNE D, rel9
DBNE X, rel9
DBNE Y, rel9
DBNE SP, rel9
INSTRUCTION GLOSSARY
V
C
–
–
1
Object Code
04 lb rr
Object Code
(if offset is positive)
04 20 rr
04 21 rr
04 24 rr
04 25 rr
04 26 rr
04 27 rr
DBNE
Cycles
Access Detail
3/3
PPP
Object Code
(if offset is negative)
04 30 rr
04 31 rr
04 34 rr
04 35 rr
04 36 rr
04 37 rr
MOTOROLA
6-71
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