Motorola HC12 Refrence Manual page 353

Table A-1 Instruction Set Summary (Continued)
Source
Form
(A) – (M) – C ⇒ A
SBCA opr
Subtract with Borrow from A
(B) – (M) – C ⇒ B
SBCB opr
Subtract with Borrow from B
1 ⇒ C
SEC
Translates to ORCC #$01
1 ⇒ I; (inhibit I interrupts)
SEI
Translates to ORCC #$10
1 ⇒ V
SEV
Translates to ORCC #$02
$00:(r1) ⇒ r2 if r1, bit 7 is 0 or
SEX r1, r2
$FF:(r1) ⇒ r2 if r1, bit 7 is 1
Sign Extend 8-bit r1 to 16-bit r2
r1 may be A, B, or CCR
r2 may be D, X, Y, or SP
Alternate mnemonic for TFR r1, r2
(A) ⇒ M
STAA opr
Store Accumulator A to Memory
(B) ⇒ M
STAB opr
Store Accumulator B to Memory
(A) ⇒ M, (B) ⇒ M+1
STD opr
Store Double Accumulator
CPU12
REFERENCE MANUAL
Operation
INSTRUCTION REFERENCE
Addr. Machine
Mode Coding (hex)
IMM 82 ii
DIR 92 dd
EXT B2 hh ll
IDX A2 xb
IDX1 A2 xb ff
IDX2 A2 xb ee ff
[D,IDX] A2 xb
[IDX2] A2 xb ee ff
IMM C2 ii
DIR D2 dd
EXT F2 hh ll
IDX E2 xb
IDX1 E2 xb ff
IDX2 E2 xb ee ff
[D,IDX] E2 xb
[IDX2] E2 xb ee ff
IMM 14 01
IMM 14 10
IMM 14 02
INH B7 eb
DIR 5A dd
EXT 7A hh ll
IDX 6A xb
IDX1 6A xb ff
IDX2 6A xb ee ff
[D,IDX] 6A xb
[IDX2] 6A xb ee ff
DIR 5B dd
EXT 7B hh ll
IDX 6B xb
IDX1 6B xb ff
IDX2 6B xb ee ff
[D,IDX] 6B xb
[IDX2] 6B xb ee ff
DIR 5C dd
EXT 7C hh ll
IDX 6C xb
IDX1 6C xb ff
IDX2 6C xb ee ff
[D,IDX] 6C xb
[IDX2] 6C xb ee ff
*
~
S X H I N Z V C
– – ∆ ∆ ∆
1 – –
3
3
3
3
4
6
6
– – ∆ ∆ ∆
1 – –
3
3
3
3
4
6
6
1 – – – – – – –
1 – – – 1 – – –
1 – – – – – – 1
1 – – – – – – –
– – ∆ ∆
2 – – 0
3
2
3
3
5
5
– – ∆ ∆
2 – – 0
3
2
3
3
5
5
– – ∆ ∆
2 – – 0
3
2
3
3
5
5
MOTOROLA
A-15
∆
∆
1
–
–
–
–
–
–