Index Manipulation Instructions - Motorola HC12 Refrence Manual

5.22 Index Manipulation Instructions

These instructions perform 8- and 16-bit operations on the three index registers and
accumulators, other registers, or memory, as shown in
Mnemonic
ABX
ABY
Mnemonic
CPS Compare SP to Memory
CPX Compare X to Memory
CPY Compare Y to Memory
Mnemonic
LDS Load SP from Memory
LDX Load X from Memory
LDY Load Y from Memory
LEAS Load Effective Address into SP
LEAX Load Effective Address into X
LEAY Load Effective Address into Y
Mnemonic
STS Store SP in Memory
STX Store X in Memory
STY Store Y in Memory
Mnemonic
TFR Transfer Register to Register
TSX
TSY
TXS
TYS
Mnemonic
EXG Exchange Register to Register
XGDX EXchange D with X
XGDY EXchange D with Y
CPU12
REFERENCE MANUAL
Table 5-23 Index Manipulation Instructions
Addition Instructions
Function
Add B to X
Add B to Y
Compare Instructions
Function
Load Instructions
Function
Store Instructions
Function
Transfer Instructions
Function
Transfer SP to X
Transfer SP to Y
Transfer X to SP
Transfer Y to SP
Exchange Instructions
Function
INSTRUCTION SET OVERVIEW
Table
Operation
(B) + (X) ⇒ X
(B) + (Y) ⇒ Y
Operation
(SP) – (M : M + 1)
(X) – (M : M + 1)
(Y) – (M : M + 1)
Operation
M : M+1
(M : M + 1) ⇒ X
(M : M + 1) ⇒ Y
Effective Address ⇒ SP
Effective Address ⇒ X
Effective Address ⇒ Y
Operation
⇒
(SP)
(X) ⇒ M : M + 1
(Y) ⇒ M : M + 1
Operation
(A, B, CCR, D, X, Y, or SP) ⇒ A, B, CCR, D, X, Y, or SP
(SP) ⇒ X
(SP) ⇒ Y
(X) ⇒ SP
(Y) ⇒ SP
Operation
(A, B, CCR, D, X, Y, or SP) ⇔ (A, B, CCR, D, X, Y, or SP)
(D) ⇔ (X)
(D) ⇔ (Y)
5-23.
⇒
SP
M:M+1
MOTOROLA
5-19