ABB ACS880 Firmware Manual page 254

254 Parameters
No. Name/Value
28.79 Freq ramp out
balancing enable
Not selected
Selected
DI1
DI2
DI3
DI4
DI5
DI6
DIO1
DIO2
Other [bit]
28.90 Frequency ref act 1
-500.00 ... 500.00
Hz
28.91 Frequency ref act 2
-500.00 ... 500.00
Hz
28.92 Frequency ref act 3
-500.00 ... 500.00
Hz
28.96 Frequency ref act 7
-500.00 ... 500.00
Hz
28.97 Frequency ref
unlimited
-500.00 ... 500.00
Hz
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Description
Selects the source for enabling/disabling speed ramp
balancing. See parameter
0 = Disabled
1 = Enabled
0.
1.
Digital input DI1 (10.02 DI delayed
Digital input DI2 (10.02 DI delayed
Digital input DI3 (10.02 DI delayed
Digital input DI4 (10.02 DI delayed
Digital input DI5 (10.02 DI delayed
Digital input DI6 (10.02 DI delayed
Digital input/output DIO1 (11.02 DIO delayed
Digital input/output DIO2 (11.02 DIO delayed
Source selection (see Terms and abbreviations
Displays the value of frequency reference source 1 (selected
by parameter 28.11 Frequency ref1
chain diagram on page 586.
This parameter is read-only.
Value of frequency reference source 1.
Displays the value of frequency reference source 2 (selected
by parameter 28.12 Frequency ref2
chain diagram on page 586.
This parameter is read-only.
Value of frequency reference source 2.
Displays the frequency reference after the function applied by
parameter 28.13 Frequency ref1 function
selection (28.14 Frequency ref1/2
chain diagram on page 586.
This parameter is read-only.
Frequency reference after selection.
Displays the frequency reference after application of constant
frequencies, control panel reference, etc. See the control
chain diagram on page 586.
This parameter is read-only.
Frequency reference 7.
Displays the frequency reference after application of critical
frequencies, but before ramping and limiting. See the control
chain diagram on page 587.
This parameter is read-only.
Frequency reference before ramping and limiting.
28.78 Freq ramp output balancing.
status, bit 0).
status, bit 1).
status, bit 2).
status, bit 3).
status, bit 4).
status, bit 5).
status, bit 0).
status, bit 1).
on page 112). -
source). See the control
source). See the control
(if any), and after
selection). See the control
Def/FbEq16
Not selected
2
3
4
5
6
7
10
11
-
See par.
46.02
-
See par.
46.02
-
See par.
46.02
-
See par.
46.02
-
See par.
46.02