Infineon Technologies C166S V2 User Manual page 66

Note: Due to the internal instruction pipeline, a write operation to the SPSG register
stalls the instruction flow until the SPSG register is really updated. The instruction
immediately following the instruction updating the SPSG register can use the new
value.
The Stack Overflow Pointer STKOV
This non-bit addressable STKOV register is compared with the SP register before each
implicit write operation which decrements the contents of the SP register. If the contents
of the SP register are equal to the contents of the STKOV register, a stack overflow trap
will occur.
STKOV
Stack Overflow Pointer
15 14 13 12
Field
STKOV
0
The STKOV register can be updated via any instruction capable of modifying a SFR.
Note: The Stack Pointer Segment Register SPSG is not taken into account for the stack
pointer comparison. The system stack cannot cross a 64k segment.
This checking mechanism is triggered before every implicit write access. The contents
of the stack pointer is compared with the contents of the overflow register, whenever the
SP is to be decremented either by a CALLA, CALLI, CALLR, CALLS, PCALL, TRAP,
SCXT or PUSH instruction.
Note: If the Stack Pointer was explicitly changed as a result of move or arithmetic
instruction, SP is not compared to the contents of the STKOV. Therefore, if the
modified Stack Pointer is below the limit set by STKOV register, the stack violation
will not be detected. The stack overflow can be detected only if the contents of SP
are equal to (not less than) the contents of the STKOV and only in case of implicit
SP modification. This means that SP may be explicitly set to the value below
permitted SP range and even be operated there without triggering any traps.
However, if SP crosses the limit of the permitted SP range from outside the range
as a result of implicit change (PUSH for example), the event (SP) = (STKOV) will
User Manual
11 10 9 8
STKOV
rw
Bits Type Description
[15:1] rw Modifiable portion of register STKOV
Specifies the segment offset address of the lower
limit of the system stack.
[0] r Fixed to 0
SFR
7 6 5
2-66
User Manual
C166S V2
Central Processing Unit
Reset Value: FA00
4 3 2 1
V 1.7, 2001-01
H
0
0
r