Infineon Technologies C166S V2 User Manual page 325

CoLOAD
Group
Syntax
Source Operand(s)
Destination Operand(s)
Operation
(tmp) ← (op2) || (op1)
(ACC) ← 0 + (tmp)
Description
Loads the 40-bit ACC register with a 40-bit source operand. The 40-bit source operand
is the sign-extended result of the concatenation of the two source operands op1 (LSW)
and op2 (MSW).
MAC Flags
MV MSL
0 -
MV Always cleared.
MSL Not affected.
ME Always cleared.
MSV Not affected.
MC Always cleared.
MZ Set if result equals zero. Cleared otherwise.
MN Set if the most significant bit of the result is set. Cleared otherwise.
Encoding
Mnemonic
CoLOAD Rw
CoLOAD Rw
CoLOAD [IDXi*] , [Rw
User Manual
Load Accumulator
Arithmetic Instructions
CoLOAD op1, op2
op1, op2 → WORD
ACC → 40-bit signed value
ME MSV
0 -
, Rw
n m
, [Rw *]
n m
*]
m
Detailed Instruction Description
MC MZ
0 *
Format
A3 nm 22 rrr0:0000
83 nm 22 rrr0:0qqq
93 Xm 22 rrr0:0qqq
8-325
User Manual
C166S V2
CoLOAD
MN Sat.
* no
Bytes
4
4
4
V 1.7, 2001-01