Infineon Technologies C166S V2 User Manual page 123

16-bit microcontroller
Table of Contents

Advertisement

xxIC
Interrupt Control Register
15
14
13
12
0
0
0
r
r
r
Field
GPX
1)
xxIR
xxIE
ILVL
GLVL
XGLVL
1)
Bit xxIR supports bit-protection
The arbitration scheme allows nesting of up to fifteen interrupt service routines of
different priority levels (Level 0 cannot be used; see note above).
Note: To reduce power, the arbitration is stopped when no interrupt request is active.
User Manual
11
10
9
0
0
0
0
r
r
r
r
Bits
Type Description
[8]
rw
Group Priority Extension
Defines the value of high-order group level bit
[7]
rwh
Interrupt Request Flag
0
1
[6]
rw
Interrupt Enable Control Bit
(individually enables/disables a specific source)
0
1
[5:2]
rw
Interrupt Priority Level
F
...
0
[1:0]
rw
Group Priority Level
3
...
0
[8],[1:0]
Extended Group Priority Level
7
...
0
Interrupt and Exception Handling
SFR
8
7
6
GPX xxIR xxIE
rw
rwh
rw
No request pending
This source has raised an interrupt request
Interrupt request is disabled
Interrupt request is enabled
Highest priority level
H
...
Lowest priority level
H
Highest priority level
H
...
Lowest priority level
H
Highest priority level
H
...
Lowest priority level
H
5-123
User Manual
Reset Value: 0000
5
4
3
2
ILVL
rw
V 1.7, 2001-01
C166S V2
H
1
0
GLVL
rw

Advertisement

Table of Contents
loading

Table of Contents