Infineon Technologies C166S V2 User Manual page 135

Field
1)
PRTFLT
1)
ILLOPA
1)
This Bit supports bit-protection
2)
Parity fault on instruction fetch interface, usable for memories with parity check.
Note: The trap service routine must clear the respective trap flag; otherwise, a new trap
will be requested after exiting the service routine. Setting a trap request flag by
software causes the same effects as if it had been set by hardware.
The reset functions (hardware, software, watchdog) may be also regarded as a type of
trap. Reset functions have the highest priority (trap priority III). Class A traps have the
second highest priority (trap priority II). At the third rank are Class B traps (trap priority I);
thus, a Class A trap can interrupt a Class B trap.
Table 5-2 Hardware Trap Summary
Exception Condition
Reset Functions:
Hardware Reset
Software Reset
Watchdog Timer Overflow
Class A Hardware Traps:
Non-Maskable Interrupt
Stack Overflow
Stack Underflow
Software Break
Class B Hardware Traps:
Undefined Opcode
Parity Fault
Protection Fault
Illegal Word Operand Access
Class A Trap
Class A traps are generated by the high priority system NMI or by special CPU events
such as the software break, a stack overflow, or an underflow event. Class A traps are
User Manual
Bits Type Description
[3] rwh Protection Fault
0
1
[2] rwh Illegal word operand access
0
1
Trap
Flag
NMI
STKOF
STKUF
SOFTBRK
UNDOPC
PARFLT
PRTFLT
ILLOPA
Interrupt and Exception Handling
No protection fault event detected
Protection fault event detected
No illegal word operand access event
detected
Illegal word operand access event detected
Trap
Vector
RESET
RESET
RESET
NMITRAP
STOTRAP
STUTRAP
SBRKTRAP
BTRAP
BTRAP
BTRAP
BTRAP
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User Manual
C166S V2
Trap Trap
Number Priority
00 III
H
00 III
H
00 III
H
02 II.3
H
04 II.2
H
06 II.1
H
08 II.0
H
0A I
H
0A I
H
0A I
H
0A I
H
V 1.7, 2001-01