Infineon Technologies C166S V2 User Manual page 303

16-bit microcontroller
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SHR
Group
Syntax
Source Operand(s)
Destination Operand(s)
Operation
(count) ← (op2)
(C) ← 0
(V) ← 0
DO WHILE ((count) ≠ 0)
END WHILE
Description
Shifts the destination word operand op1 right by the number of times as specified by the
source operand op2. The most significant bits of the result are filled with zeros
accordingly. Since the bits shifted out effectively represent the remainder, the Overflow
flag is used instead as a Rounding flag. A shift right is a division by a power of two. The
overflow flag with the carry flag allows determination of whether the fractional part of the
division result is greater than, less than, or equal to one half (0.5 in decimal base). This
allows rounding of the division result accordingly. Only shift values between 0 and 15
are allowed. When using a GPR as the count control, only the least significant four bits
are used.
CPU Flags
E
Always cleared.
Z
Set if result equals zero. Cleared otherwise.
V
Set if in any cycle of the shift operation a 1 is shifted out of the carry flag.
Cleared in case of a shift count equal 0.
User Manual
Shift and Rotate Instructions
SHR op1, op2
op1 → WORD
op2 → shift counter
op1 → WORD
(V) ← (C)
(V)
(C) ← (op1[0])
(op1[n]) ← (op1[n+1]) [n=0...14]
(op1[15]) ← 0
(count) ← (count) - 1
E
Z
0
*
Detailed Instruction Description
Shift Right
V
C
S
S
8-303
User Manual
C166S V2
SHR
N
*
V 1.7, 2001-01

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