Infineon Technologies C166S V2 User Manual page 160

Field Bits
CSPEN [7:4]
SAPEN [3:0]
1)
disabled pins are tristate and/or usable as General Purpose IO (GPIO)
2)
A change of the bit content is not valid before the next external bus access cycle.
The EBC Mode register 1 controls the general behaviour of the EBC.
EBC Mode Register 1
EBCMOD1
15 14 13 12
0 0 0
r r r
Bits
0 [15:7]
[5]
DHPDIS [6]
1)
APDIS [4:0]
1)
For a demultiplexed external bus access with the address pins disabled no address will be available.
User Manual
Typ Description
rw CS Pins Enable
0000
0001
...
1000
else
rw Segment Addresses Pins Enable
0000 no segment address pin enabled
0001 enables address pin A[16]
...
1000 enables address pins A[23:16]
else reserved
11 10 9
0 0 0 0
r r r r
Typ Description
r Reserved
The software always reads a '0'. Although these bits are read
only, the software should always write a '0' in case of a write
access.
rw Data High Pins Disable
0 AD Bus Pins[15:8] enabled
1 AD Bus Pins[15:8] disabled, can be used as GPIO
rw
Address Pins Disable
00000 Address Bus Pins [15:0] enabled
11111 Address Bus Pins [15:0] disabled, can be used as GPIO
others reserved (do not use)
1)
no chipselect pins enabled
enables pin CS0
enables pins CS7, ..., CS0
reserved
XSFR
8 7 6
DHP
0 0
DIS
r r rw
6-160
User Manual
External Bus Controller
1)
Reset value: 0000
5 4 3 2
0 APDIS
r rw
V 1.7, 2001-01
C166S V2
H
1 0