Infineon Technologies C166S V2 User Manual page 218

ASHR
Group
Syntax
Source Operand(s)
Destination Operand(s)
Operation
(count) ← (op2)
(V) ← 0
(C) ← 0
DO WHILE ((count) ≠ 0)
END WHILE
Description
Arithmetically shifts the destination word operand op1 right by the number of times as
specified by the source operand op2. To preserve the sign of the original operand op1,
the most significant bits of the result are filled with zeros if the original most significant
bit was a 0 or with ones if the original most significant bit was a 1. The Overflow flag is
used as a Rounding flag. The least significant bit is shifted into the Carry. Only shift
values between 0 and 15 are allowed. When using a GPR as the count control, only the
least significant 4 bits are used.
CPU Flags
E Always cleared.
Z Set if result equals zero. Cleared otherwise.
V Set if in any cycle of the shift operation a 1 is shifted out of the carry flag.
Cleared in case of a shift count equal 0.
C The carry flag is set according to the last least significant bit shifted out of
op1. Cleared for a shift count of zero.
N Set if the most significant bit of the result is set. Cleared otherwise.
User Manual
Arithmetic Shift Right
Shift and Rotate Instructions
ASHR op1, op2
op1 → WORD
op2 → shift counter
op1 → WORD
(V) ← (C)
∨
(V)
(C) ← (op1[0])
(op1[n]) ← (op1[n+1]) [n=0...14]
(count) ← (count) - 1
E Z
0 *
Detailed Instruction Description
V C
* *
8-218
User Manual
C166S V2
ASHR
N
*
V 1.7, 2001-01