Infineon Technologies C166S V2 User Manual page 209

'S' The flag is set due to rules which deviate from the described standard.
For more details see instruction pages (below) or the ALU status flags
description.
'-' The flag is not affected by the operation.
'0' The flag is cleared by the operation.
'NOR' The flag contains the logical NORing of the two specified bit operands.
'AND' The flag contains the logical ANDing of the two specified bit operands.
'OR' The flag contains the logical ORing of the two specified bit operands.
'XOR' The flag contains the logical XORing of the two specified bit operands.
'B' The flag contains the original value of the specified bit operand.
'B' The flag contains the complemented value of the specified bit operand.
Note: If the PSW register was specified as the destination operand of an instruction, the
condition flags can not be interpreted as just described, because the PSW register
is modified depending on the data format of the instruction as follows:
For word operations, the PSW register is overwritten with the word result. For byte
operations, the non-addressed byte is cleared and the addressed byte is
overwritten. For bit or bit-field operations on the PSW register, only the specified
bits are modified. Supposed that the condition flags were not selected as
destination bits, they stay unchanged. This means that they keep the state after
execution of the previous instruction.
In any case, if the PSW was the destination operand of an instruction, the PSW
flags do NOT represent the condition flags of this instruction as usual.
• Addressing Modes: This part specifies which combinations of different addressing
modes are available for the required operands. The selected addressing mode
combination is usually specified by the opcode of the corresponding instruction.
However, there are some arithmetic and logical instructions for which the addressing
mode combination is not specified by the (identical) opcodes but by particular bits
within the operand field.
The addressing mode entries are made up of three elements:
Mnemonic Shows accepted operands for the respective instruction.
Format This part specifies the format of the instructions as it is represented in the
assembler listing.
representation of the assembler and the corresponding internal organization of such an
instruction format (N = nibble = 4 bits).
The following symbols are used to describe the instruction formats:
00 through FF : Instruction Opcodes
H H
User Manual
Figure 8-1 shows the relation between the instruction format
Detailed Instruction Description
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User Manual
C166S V2
V 1.7, 2001-01