Infineon Technologies C166S V2 User Manual page 196

Hex- Bytes/ Mnemonic
code Cycles
40 2/1 CMP
41 2/1 CMPB
42 4/reg CMP
43 4/reg CMPB
44 -/- -
45 -/- -
46 4/1 CMP
47 4/1 CMPB
48 2/1 CMP
49 2/1 CMPB
4A 4/bit BMOV
4B 2/4+15 DIV
4C 2/1 SHL
4D 2/0-1 JMPR
4E 2/1 BCLR
4F 2/1 BSET
50 2/1 XOR
51 2/1 XORB
52 4/reg XOR
53 4/reg XORB
54 4/reg XOR
55 4/reg XORB
56 4/1 XOR
57 4/1 XORB
58 2/1 XOR
59 2/1 XORB
5A 4/bit BOR
5B 2/4+15 DIVU
5C 2/1 SHL
5D 2/0-1 JMPR
5E 2/1 BCLR
5F 2/1 BSET
User Manual
Operands Hex-
code
Rw, Rw 60
Rb, Rb 61
reg, mem 62
reg, mem 63
- 64
- 65
reg, #data16 66
reg, #data8 67
Rw, [Rw +] or 68
Rw, [Rw] or
Rw, #data3
Rb, [Rw +] or 69
Rb, [Rw] or
Rb, #data3
bitaddr, bitaddr 6A
Rw 6B
Rw, Rw 6C
cc_V, rel 6D
bitoff.4 6E
bitoff.4 6F
Rw, Rw 70
Rb, Rb 71
reg, mem 72
reg, mem 73
mem, reg 74
mem, reg 75
reg, #data16 76
reg, #data8 77
Rw, [Rw +] or 78
Rw, [Rw] or
Rw, #data3
Rb, [Rw +] or 79
Rb, [Rw] or
Rb, #data3
bitaddr, bitaddr 7A
Rw 7B
Rw, #data4 7C
cc_NV, rel 7D
bitoff.5 7E
bitoff.5 7F
7-196
Bytes/ Mnemonic
Cycles
2/1 AND
2/1 ANDB
4/reg AND
4/reg ANDB
4/reg AND
4/reg ANDB
4/1 AND
4/1 ANDB
2/1 AND
2/1 ANDB
4/bit BAND
2/4+15 DIVL
2/1 SHR
2/0-1 JMPR
2/1 BCLR
2/1 BSET
2/1 OR
2/1 ORB
4/reg OR
4/reg ORB
4/reg OR
4/reg ORB
4/1 OR
4/1 ORB
2/1 OR
2/1 ORB
4/bit BXOR
2/4+15 DIVLU
2/1 SHR
2/0-1 JMPR
2/1 BCLR
2/1 BSET
User Manual
C166S V2
Instruction Set
Operands
Rw, Rw
Rb, Rb
reg, mem
reg, mem
mem, reg
mem, reg
reg, #data16
reg, #data8
Rw, [Rw +] or
Rw, [Rw] or
Rw, #data3
Rb, [Rw +] or
Rb, [Rw] or
Rb, #data3
bitaddr, bitaddr
Rw
Rw, Rw
cc_N, rel
bitoff.6
bitoff.6
Rw, Rw
Rb, Rb
reg, mem
reg, mem
mem, reg
mem, reg
reg, #data16
reg, #data8
Rw, [Rw +] or
Rw, [Rw] or
Rw, #data3 1)
Rb, [Rw +] or
Rb, [Rw] or
Rb, #data3
bitaddr, bitaddr
Rw
Rw, #data4
cc_NN, rel
bitoff.7
bitoff.7
V 1.7, 2001-01