Infineon Technologies C166S V2 User Manual page 248

DIVU
Group
Syntax
Source Operand(s)
Destination Operand(s)
Operation
(MDL) ← (MDL) / (op1)
(MDH) ← (MDL) mod (op1)
Description
Performs an unsigned 16-bit by 16-bit division of the low order word stored in the MD
register by the source word operand op1. The unsigned quotient is then stored in the
low order word of the MD register (MDL) and the remainder is stored in the high order
word of the MD register (MDH).
CPU Flags
E Always cleared.
Z Set if quotient, stored in the MDL register, equals zero. Cleared
otherwise. Undefined if the V flag is set.
V Set if the divisor op1 was zero.
C Always cleared.
N Set if the most significant bit of the quotient, stored in the MDL register, is
set. Cleared otherwise. Undefined if the V flag is set.
Encoding
Mnemonic
DIVU Rw
User Manual
16-by-16 Unsigned Division
Arithmetic Instructions
DIVU op1
op1 → WORD
MDL → WORD
MD → DOUBLEWORD
E Z
0 *
n
Detailed Instruction Description
V C
* 0
Format
5B nn
8-248
User Manual
C166S V2
DIVU
N
*
Bytes
2
V 1.7, 2001-01