Infineon Technologies C166S V2 User Manual page 32

Field Bits
FIFODEPTH [15:12]
FIFOFED [11:10]
BYPPF [9]
BYPF [8]
EIOIAEN [7]
1)
STEN [6]
LFIC [5]
OVRUN [4]
RETST [3]
User Manual
Type Description
rw FIFO Depth configuration
0000 No FIFO (entries)
0001 One FIFO entry
... ....
1000 Eight FIFO entries
1001 reserved
... ...
1111 reserved
rw FIFO Fed configuration
00 FIFO disabled
01 FIFO filled with up to one instruction per cycle
10 FIFO filled with up to two instructions per cycle
11 FIFO filled with up to three instruction per cycle
rw Prefetch Bypass control
0 Bypass path from prefetch to decode disabled
1 Bypass path from prefetch to decode available
rw Fetch Bypass control
0 Bypass path from fetch to decode disabled
1 Bypass path from fetch to decode available
rw Early IO Injection Acknowledge Enable
0 Injection acknowledge by destructive read not
guaranteed
1 Injection acknowledge by destructive read
guaranteed
rw Stall Instruction Enable
0 Stall Instruction disabled
1 Stall Instruction enabled
rw Linear Follower Instruction Cache
0 Linear Follower Instruction Cache disabled
1 Linear Follower Instruction Cache enabled
rw Pipeline control
0 Overrun of pipeline bubbles not allowed
1 Overrun of pipeline bubbles allowed
rw Enable return Stack
0 Return Stack is disabled
1 Return Stack is enabled
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User Manual
C166S V2
Central Processing Unit
V 1.7, 2001-01