Infineon Technologies C166S V2 User Manual page 195

16-bit microcontroller
Table of Contents

Advertisement

Hex-
Bytes/
Mnemonic
code
Cycles
00
2/1
ADD
01
2/1
ADDB
02
4/reg
ADD
03
4/reg
ADDB
04
4/reg
ADD
05
4/reg
ADDB
06
4/1
ADD
07
4/1
ADDB
08
2/1
ADD
09
2/1
ADDB
0A
4/1
BFLDL
0B
2/1
MUL
0C
2/1
ROL
0D
2/0-1
JMPR
0E
2/1
BCLR
0F
2/1
BSET
10
2/1
ADDC
11
2/1
ADDCB
12
4/reg
ADDC
13
4/reg
ADDCB
14
4/reg
ADDC
15
4/reg
ADDCB
16
4/1
ADDC
17
4/1
ADDCB
18
2/1
ADDC
19
2/1
ADDCB
1A
4/1
BFLDH
1B
2/1
MULU
1C
2/1
ROL
1D
2/0-1
JMPR
1E
2/1
BCLR
1F
2/1
BSET
User Manual
Operands
Hex-
code
Rw, Rw
20
Rb, Rb
21
reg, mem
22
reg, mem
23
mem, reg
24
mem, reg
25
reg, #data16
26
reg, #data8
27
Rw, [Rw +] or
28
Rw, [Rw] or
Rw, #data3
Rb, [Rw +] or
29
Rb, [Rw] or
Rb, #data3
bitoff, #mask8,
2A
#data8
Rw, Rw
2B
Rw, Rw
2C
cc_UC, rel
2D
bitoff.0
2E
bitoff.0
2F
Rw, Rw
30
Rb, Rb
31
reg, mem
32
reg, mem
33
mem, reg
34
mem, reg
35
reg, #data16
36
reg, #data8
37
Rw, [Rw +] or
38
Rw, [Rw] or
Rw, #data3
Rb, [Rw +] or
39
Rb, [Rw] or
Rb, #data3
bitoff, #mask8,
3A
#data8
Rw, Rw
3B
Rw, #data4
3C
cc_NET, rel
3D
bitoff.1
3E
bitoff.1
3F
7-195
Bytes/
Mnemonic
Cycles
2/1
SUB
2/1
SUBB
4/reg
SUB
4/reg
SUBB
4/reg
SUB
4/reg
SUBB
4/1
SUB
4/1
SUBB
2/1
SUB
2/1
SUBB
4/bit
BCMP
2/1
PRIOR
2/1
ROR
2/0-1
JMPR
2/1
BCLR
2/1
BSET
2/1
SUBC
2/1
SUBCB
4/reg
SUBC
4/reg
SUBCB
4/reg
SUBC
4/reg
SUBCB
4/1
SUBC
4/1
SUBCB
2/1
SUBC
2/1
SUBCB
4/bit
BMOVN
-/-
-
2/1
ROR
2/0-1
JMPR
2/1
BCLR
2/1
BSET
User Manual
C166S V2
Instruction Set
Operands
Rw, Rw
Rb, Rb
reg, mem
reg, mem
mem, reg
mem, reg
reg, #data16
reg, #data8
Rw, [Rw +] or
Rw, [Rw] or
Rw, #data3
Rb, [Rw +] or
Rb, [Rw] or
Rb, #data3
bitaddr, bitaddr
Rw, Rw
Rw, Rw
cc_EQ, rel or
cc_Z, rel
bitoff.2
bitoff.2
Rw, Rw
Rb, Rb
reg, mem
reg, mem
mem, reg
mem, reg
reg, #data16
reg, #data8
Rw, [Rw +] or
Rw, [Rw] or
Rw, #data3
Rb, [Rw +] or
Rb, [Rw] or
Rb, #data3
bitaddr, bitaddr
-
Rw, #data4
cc_NE, rel or
cc_NZ, rel
bitoff.3
bitoff.3
V 1.7, 2001-01

Advertisement

Table of Contents
loading

Table of Contents