Renesas H8 Series Hardware Manual page 17

14.5 Operation in Clocked Synchronous Mode ......................................................................... 223
14.5.1 Clock..................................................................................................................... 223
14.5.2 SCI3 Initialization................................................................................................. 224
14.5.3 Serial Data Transmission ...................................................................................... 224
14.5.4 Serial Data Reception (Clocked Synchronous Mode)........................................... 227
14.5.5 Simultaneous Serial Data Transmission and Reception........................................ 229
14.6 Multiprocessor Communication Function.......................................................................... 231
14.6.1 Multiprocessor Serial Data Transmission ............................................................. 233
14.6.2 Multiprocessor Serial Data Reception .................................................................. 234
14.7 Interrupts............................................................................................................................ 238
14.8 Usage Notes ....................................................................................................................... 238
14.8.1 Break Detection and Processing ........................................................................... 238
14.8.2 Mark State and Break Sending.............................................................................. 239
14.8.3 Receive Error Flags and Transmit Operations
(Clocked Synchronous Mode Only) ..................................................................... 239
14.8.4 Receive Data Sampling Timing and Reception Margin in Asynchronous
Mode ..................................................................................................................... 239
2
Section 15 I C Bus Interface 2 (IIC2) ................................................................241
15.1 Features.............................................................................................................................. 241
15.2 Input/Output Pins ............................................................................................................... 243
15.3 Register Descriptions ......................................................................................................... 244
2
15.3.1 I C Bus Control Register 1 (ICCR1)..................................................................... 244
2
15.3.2 I C Bus Control Register 2 (ICCR2)..................................................................... 247
2
15.3.3 I C Bus Mode Register (ICMR)............................................................................ 249
2
15.3.4 I C Bus Interrupt Enable Register (ICIER) ........................................................... 251
2
15.3.5 I C Bus Status Register (ICSR)............................................................................. 253
15.3.6 Slave Address Register (SAR).............................................................................. 255
2
15.3.7 I C Bus Transmit Data Register (ICDRT)............................................................. 256
2
15.3.8 I C Bus Receive Data Register (ICDRR).............................................................. 256
2
15.3.9 I C Bus Shift Register (ICDRS)............................................................................ 256
15.4 Operation ........................................................................................................................... 257
2
15.4.1 I C Bus Format...................................................................................................... 257
15.4.2 Master Transmit Operation ................................................................................... 258
15.4.3 Master Receive Operation..................................................................................... 260
15.4.4 Slave Transmit Operation ..................................................................................... 262
15.4.5 Slave Receive Operation....................................................................................... 264
15.4.6 Clocked Synchronous Serial Format..................................................................... 266
15.4.7 Noise Canceler...................................................................................................... 268
15.4.8 Example of Use..................................................................................................... 269
Rev. 1.00 Aug. 28, 2006 Page xv of xxviii