Renesas H8 Series Hardware Manual page 13

5.7.1 Prescaler S .............................................................................................................. 82
5.7.2 Prescaler W............................................................................................................. 82
5.8 Usage Notes ......................................................................................................................... 83
5.8.1 Note on Resonators................................................................................................. 83
5.8.2 Notes on Board Design ........................................................................................... 83
Section 6 Power-Down Modes ............................................................................85
6.1 Register Descriptions ........................................................................................................... 85
6.1.1 System Control Register 1 (SYSCR1) .................................................................... 85
6.1.2 System Control Register 2 (SYSCR2) .................................................................... 87
6.1.3 Module Standby Control Register 1 (MSTCR1) .................................................... 88
6.2 Mode Transitions and States of LSI..................................................................................... 89
6.2.1 Sleep Mode ............................................................................................................. 92
6.2.2 Standby Mode ......................................................................................................... 92
6.2.3 Subsleep Mode........................................................................................................ 93
6.2.4 Subactive Mode ...................................................................................................... 93
6.3 Operating Frequency in Active Mode.................................................................................. 94
6.4 Direct Transition .................................................................................................................. 94
6.4.1 Direct Transition from Active Mode to Subactive Mode ....................................... 94
6.4.2 Direct Transition from Subactive Mode to Active Mode ....................................... 95
6.5 Module Standby Function.................................................................................................... 95
Section 7 ROM ....................................................................................................97
7.1 Block Configuration............................................................................................................. 98
7.2 Register Descriptions ........................................................................................................... 99
7.2.1 Flash Memory Control Register 1 (FLMCR1)........................................................ 99
7.2.2 Flash Memory Control Register 2 (FLMCR2)...................................................... 100
7.2.3 Erase Block Register 1 (EBR1) ............................................................................ 101
7.2.4 Flash Memory Power Control Register (FLPWCR) ............................................. 102
7.2.5 Flash Memory Enable Register (FENR) ............................................................... 102
7.3 On-Board Programming Modes......................................................................................... 103
7.3.1 Boot Mode ............................................................................................................ 103
7.3.2 Programming/Erasing in User Program Mode...................................................... 106
7.4 Flash Memory Programming/Erasing ................................................................................ 107
7.4.1 Program/Program-Verify ...................................................................................... 107
7.4.2 Erase/Erase-Verify................................................................................................ 109
7.4.3 Interrupt Handling when Programming/Erasing Flash Memory........................... 110
7.5 Program/Erase Protection .................................................................................................. 112
7.5.1 Hardware Protection ............................................................................................. 112
7.5.2 Software Protection............................................................................................... 112
Rev. 1.00 Aug. 28, 2006 Page xi of xxviii