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Registers States In Each Operating Mode - Renesas H8 Series Hardware Manual

16-bit single-chip microcomputer

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19.3

Registers States in Each Operating Mode

Register

Name

Reset

Initialized

LVDCR

Initialized

LVDSR

Initialized

RSTSR

Initialized

CKCSR

Initialized

RCCR

Initialized

RCTRMDPR

Initialized

RCTRMDR

Initialized

ICCR1

Initialized

ICCR2

Initialized

ICMR

Initialized

ICIER

Initialized

ICSR

Initialized

SAR

Initialized

ICDRT

Initialized

ICDRR

TMRW

Initialized

TCRW

Initialized

TIERW

Initialized

TSRW

Initialized

TIOR0

Initialized

TIOR1

Initialized

TCNT

Initialized

GRA

Initialized

GRB

Initialized

GRC

Initialized

GRD

Initialized

FLMCR1

Initialized

FLMCR2

Initialized

FLPWCR

Initialized

EBR1

Initialized

FENR

Initialized

Active

Sleep

—

—

—

—

—

—

—

—

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Subactive Subsleep

—

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—

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—

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—

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Initialized

Initialized

—

—

—

—

Initialized

Initialized

—

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Rev. 1.00 Aug. 28, 2006 Page 313 of 400

Section 19 List of Registers

Standby

Module

—

LVDC (optional)

—

CPG

On-chip oscillator

—

IIC2

—

—

—

—

—

—

—

—

Timer W

—

—

—

—

—

—

—

—

—

—

Initialized

ROM

—

—

Initialized

—

REJ09B0268-0100

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