Serial Control Register 3 (Scr3) - Renesas H8 Series Hardware Manual

Section 14 Serial Communication Interface 3 (SCI3)
Bit Bit Name
1 CKS1
0 CKS0
14.3.6

Serial Control Register 3 (SCR3)

SCR3 is a register that enables or disables SCI3 transfer operations and interrupt requests, and is
also used to select the transfer clock source. For details on interrupt requests, refer to section 14.7,
Interrupts.
Bit Bit Name
7 TIE
6 RIE
5 TE
4 RE
Rev. 1.00 Aug. 28, 2006 Page 206 of 400
REJ09B0268-0100
Initial
Value R/W Description
0 R/W Clock Select 0 and 1
0 R/W These bits select the clock source for the on-chip baud
rate generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relationship between the bit rate register setting
and the baud rate, see section 14.3.8, Bit Rate Register
(BRR). n is the decimal representation of the value of n in
BRR (see section 14.3.8, Bit Rate Register (BRR)).
Initial
Value R/W Description
0 R/W Transmit Interrupt Enable
When this bit is set to 1, the TXI interrupt request is
enabled.
0 R/W Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt requests
are enabled.
0 R/W Transmit Enable
When this bit is set to 1, transmission is enabled.
0 R/W Receive Enable
When this bit is set to 1, reception is enabled.