Timer Counter Wd (Tcwd) - Renesas H8 Series Hardware Manual

Bit Bit Name
2 WDON
1 B0WI
0 WRST
13.2.2

Timer Counter WD (TCWD)

TCWD is an 8-bit readable/writable up-counter. When TCWD overflows from H'FF to H'00, the
internal reset signal is generated and the WRST bit in TCSRWD is set to 1. TCWD is initialized to
H'00.
Initial
Value R/W Description
1 R/W Watchdog Timer On
TCWD starts counting up when WDON is set to 1 and
halts when WDON is cleared to 0.
[Setting condition]
When 1 is written to the WDON bit while writing 0 to the
B2WI bit when the TCSRWE bit=1
[Clearing condition]
•
•
1 R/W Bit 0 Write Inhibit
This bit can be written to the WRST bit only when the
write value of the B0WI bit is 0. This bit is always read as
1.
0 R/W Watchdog Timer Reset
[Setting condition]
When TCWD overflows and an internal reset signal is
generated
[Clearing condition]
•
•
Reset by RES pin
When 0 is written to the WDON bit while writing 0 to
the B2WI when the TCSRWE bit=1
Reset by RES pin
When 0 is written to the WRST bit while writing 0 to
the B0WI bit when the TCSRWE bit=1
Rev. 1.00 Aug. 28, 2006 Page 197 of 400
Section 13 Watchdog Timer
REJ09B0268-0100