Renesas H8 Series Hardware Manual page 24

Section 13 Watchdog Timer
Figure 13.1 Block Diagram of Watchdog Timer ........................................................................ 195
Figure 13.2 Watchdog Timer Operation Example...................................................................... 199
Section 14 Serial Communication Interface 3 (SCI3)
Figure 14.1 Block Diagram of SCI3........................................................................................... 202
Figure 14.2 Data Format in Asynchronous Communication ...................................................... 215
Figure 14.3 Relationship between Output Clock and Transfer Data Phase
(Asynchronous Mode) (Example with 8-Bit Data, Parity, Two Stop Bits) ............. 215
Figure 14.4 Sample SCI3 Initialization Flowchart ..................................................................... 216
Figure 14.5 Example SCI3 Operation in Transmission in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ........................................................................... 217
Figure 14.6 Sample Serial Transmission Flowchart (Asynchronous Mode) .............................. 218
Figure 14.7 Example SCI3 Operation in Reception in Asynchronous Mode
(8-Bit Data, Parity, One Stop Bit) ........................................................................... 219
Figure 14.8 Sample Serial Data Reception Flowchart (Asynchronous mode) (1)...................... 221
Figure 14.8 Sample Serial Reception Data Flowchart (2) .......................................................... 222
Figure 14.9 Data Format in Clocked Synchronous Communication .......................................... 223
Figure 14.10 Example of SCI3 Operation in Transmission in Clocked Synchronous Mode...... 225
Figure 14.11 Sample Serial Transmission Flowchart (Clocked Synchronous Mode) ................ 226
Figure 14.12 Example of SCI3 Reception Operation in Clocked Synchronous Mode............... 227
Figure 14.13 Sample Serial Reception Flowchart (Clocked Synchronous Mode)...................... 228
Figure 14.14 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations
(Clocked Synchronous Mode) .............................................................................. 230
Figure 14.15 Example of Communication Using Multiprocessor Format
(Transmission of Data H'AA to Receiving Station A).......................................... 232
Figure 14.16 Sample Multiprocessor Serial Transmission Flowchart ........................................ 233
Figure 14.17 Sample Multiprocessor Serial Reception Flowchart (1)........................................ 235
Figure 14.17 Sample Multiprocessor Serial Reception Flowchart (2)........................................ 236
Figure 14.18 Example of SCI3 Operation in Reception Using Multiprocessor Format
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit) ............................. 237
Figure 14.19 Receive Data Sampling Timing in Asynchronous Mode ...................................... 240
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Section 15 I C Bus Interface 2 (IIC2)
Figure 15.1 Block Diagram of I
Figure 15.2 External Circuit Connections of I/O Pins ................................................................ 243
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Figure 15.3 I C Bus Formats ...................................................................................................... 257
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Figure 15.4 I C Bus Timing........................................................................................................ 257
Figure 15.5 Master Transmit Mode Operation Timing (1)......................................................... 259
Figure 15.6 Master Transmit Mode Operation Timing (2)......................................................... 259
Figure 15.7 Master Receive Mode Operation Timing (1) .......................................................... 261
Rev. 1.00 Aug. 28, 2006 Page xxii of xxviii
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C Bus Interface 2..................................................................... 242