Renesas HD64F36092G Manuals

Manuals and User Guides for Renesas HD64F36092G. We have 1 Renesas HD64F36092G manual available for free PDF download: Hardware Manual

Renesas HD64F36092G Hardware Manual (434 pages)

16-Bit Single-Chip Microcomputer

Brand: Renesas | Category: Computer Hardware | Size: 2.67 MB

General Precautions on Handling of Product
6
Preface
8
Table of Contents
11
Section 1 Overview

31
Section 2 CPU

39
- Address Space and Memory Map
  40
- Figure 2.1 Memory Map
  40
- Register Configuration
  41
Appendix

43
Section 3 Exception Handling

73
Section 4 Address Break

87
Section 5 Clock Pulse Generators

93
Section 6 Power-Down Modes

115
Section 7 ROM

127
Section 8 RAM

145
Section 9 I/O Ports

147
- Port 1
  147
  - Figure 9.1 Port 1 Pin Configuration
    147
  - Port Mode Register 1 (PMR1)
    148
  - Port Control Register 1 (PCR1)
    149
  - Port Data Register 1 (PDR1)
    150
  - Port Pull-Up Control Register 1 (PUCR1)
    150
  - Pin Functions
    151
- Port 2
  153
  - Port Control Register 2 (PCR2)
    153
  - Figure 9.2 Port 2 Pin Configuration
    153
  - Port Data Register 2 (PDR2)
    154
  - Pin Functions
    154
- Port 5
  155
  - Figure 9.3 Port 5 Pin Configuration
    155
  - Port Mode Register 5 (PMR5)
    156
  - Port Control Register 5 (PCR5)
    157
  - Port Data Register 5 (PDR5)
    158
  - Port Pull-Up Control Register 5 (PUCR5)
    158
  - Pin Functions
    159
- Port 7
  161
  - Figure 9.4 Port 7 Pin Configuration
    161
  - Port Control Register 7 (PCR7)
    162
  - Port Data Register 7 (PDR7)
    162
  - Pin Functions
    163
- Port 8
  164
  - Figure 9.5 Port 8 Pin Configuration
    164
  - Port Control Register 8 (PCR8)
    165
  - Port Data Register 8 (PDR8)
    165
  - Pin Functions
    166
- Port B
  169
  - Port Data Register B (PDRB)
    169
  - Figure 9.6 Port B Pin Configuration
    169
- Port C
  170
  - Port Control Register C (PCRC)
    170
  - Figure 9.7 Port C Pin Configuration
    170
  - Port Data Register C (PDRC)
    171
  - Pin Functions
    171
Section 10 Timer a

173
- Features
  173
- Input/Output Pins
  174
- Figure 10.1 Block Diagram of Timer a
  174
- Table 10.1 Pin Configuration
  174
- Register Descriptions
  175
  - Timer Mode Register a (TMA)
    175
  - Timer Counter a (TCA)
    176
- Operation
  177
  - Interval Timer Operation
    177
  - Clock Time Base Operation
    177
  - Clock Output
    177
- Usage Note
  177
Section 11 Timer V

179
Section 12 Timer W

193
Section 13 Watchdog Timer

225
- Features
  225
- Figure 13.1 Block Diagram of Watchdog Timer
  225
- Register Descriptions
  226
- Operation
  229
- Figure 13.2 Watchdog Timer Operation Example
  229
Section 14 Serial Communication Interface 3 (SCI3)

231
Section 15 I C Bus Interface 2 (IIC2)

271
Section 16 A/D Converter

305
- Features
  305
- Figure 16.1 Block Diagram of A/D Converter
  306
- Input/Output Pins
  307
- Table 16.1 Pin Configuration
  307
- Register Descriptions
  308
- Operation
  312
  - Single Mode
    312
  - Scan Mode
    312
  - Input Sampling and A/D Conversion Time
    313
  - Figure 16.2 A/D Conversion Timing
    313
  - External Trigger Input Timing
    314
  - Figure 16.3 External Trigger Input Timing
    314
  - Table 16.3 A/D Conversion Time (Single Mode)
    314
- A/D Conversion Accuracy Definitions
  315
- Figure 16.4 A/D Conversion Accuracy Definitions (1)
  316
- Figure 16.5 A/D Conversion Accuracy Definitions (2)
  316
- Usage Notes
  317
Section 17 Band-Gap Circuit, Power-On Reset, and Low-Voltage Detection Circuits

319
Section 18 Power Supply Circuit

331
Section 19 List of Registers

333
- Register Addresses (Address Order)
  334
- Register Bits
  339
- Registers States in each Operating Mode
  343
Section 20 Electrical Characteristics

347
Appendix A Instruction Set

369
Appendix B I/O Port Block Diagrams

399
Appendix C Product Code Lineup

419
Appendix D Package Dimensions

420
Appendix E Function Comparison

426
Index

427

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Renesas HD64F36092G Manuals

Renesas HD64F36092G Hardware Manual (434 pages)

Table of Contents

Section 1 Overview

Section 2 CPU

Appendix

Section 3 Exception Handling

Section 4 Address Break

Section 5 Clock Pulse Generators

Section 6 Power-Down Modes

Section 7 ROM

Section 8 RAM

Section 9 I/O Ports

Section 10 Timer a

Section 11 Timer V

Section 12 Timer W

Section 13 Watchdog Timer

Section 14 Serial Communication Interface 3 (SCI3)

Section 15 I C Bus Interface 2 (IIC2)

Section 16 A/D Converter

Section 17 Band-Gap Circuit, Power-On Reset, and Low-Voltage Detection Circuits

Section 18 Power Supply Circuit

Section 19 List of Registers

Section 20 Electrical Characteristics

Appendix A Instruction Set

Appendix B I/O Port Block Diagrams

Appendix C Product Code Lineup

Appendix D Package Dimensions

Appendix E Function Comparison

Index

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