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18.2.4
Power Management
At this time, USB Host Controller supports minimal system level power management features.
Each system has its own requirements which makes it impossible to satisfy. The only power
management feature implemented is the disabling of the USB clock generator in U
S
SB
USPEND
state. Additional power management features will require slight modifications.
The design supports PCICLK frequencies from 0 to 33 MHz. Synchronization between the PCI
and USB clock domains is frequency independent.
Remote wakeup of USB is asynchronously implemented from the Ports to the PCI INTA#.
The design currently requires CLK48 to be operational at all times. If it is necessary to stop the 48
MHz clock the system design will require that the signal used to enable and disable the USB clock
generators also be used to wake the 48 MHz clock source. Currently, the
RemoteWakeupConnected and RemoteWakeupEnable bits in the HcControl register are not
implemented. These bits may be implemented in conjunction with such an implementation to
wake the clocking. Also, the OpenHCI 1.0 spec. description is incorrect in stating that this signal
is associated with the ResumeDetected interrupt. It can be but is not limited to ResumeDetected,
and is intended to be defined by the system wakeup requirements above OpenHCI (i.e. system
event trigger, if necessary).
Rev. 3.0, 03/01, page 315 of 390
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