Table 20-14. Afeck Clock Input Ac Timing Spec. (Pll1 : Operating); Table 20-15. Uck Clock Input Ac Timing Spec. (Pll2 : Bypass); Table 20-16. Uck Clock Input Ac Timing Spec. (Pll2 : Operating) - Hitachi HD64465 User Manual

Table 20.14 AFECK clock input AC Timing Spec. (PLL1 : operating) (unit : ns)
Symbol Parameter
t AFECK clock input cycle time
ACKcyc
t AFECK clock input high level pulse width
ACKH
t AFECK clock input low level pulse width
ACKL
t AFECK clock input rise time
ACKr
t AFECK clock input fall time
ACKf
Table 20.15 UCK clock input AC Timing Spec. (PLL2 : bypass) (unit : ns)
Symbol Parameter
t UCK clock input cycle time
UCKcyc
t UCK clock input high level pulse width
UCKH
t UCK clock input low level pulse width
UCKL
t UCK clock input rise time
UCKr
t UCK clock input fall time
UCKf
Table 20.16 UCK clock input AC Timing Spec. (PLL2 : operating) (unit : ns)
Symbol Parameter
t UCK clock input cycle time
UCKcyc
t UCK clock input high level pulse width
UCKH
t UCK clock input low level pulse width
UCKL
t UCK clock input rise time
UCKr
t UCK clock input fall time
UCKf
Min Typ Max
80 81.38 83
34 -
34 -
- 4
- 4
Min Typ Max
19 20.83 22
5 -
5 -
- 4
- 4
Min Typ Max
81 83.33 85
35 -
35 -
- 4
- 4
Rev. 3.0, 03/01, page 353 of 390
Comment
Figure 20.26
Figure 20.26
Figure 20.26
Figure 20.26
Figure 20.26
Comment
Figure 20.27
Figure 20.27
Figure 20.27
Figure 20.27
Figure 20.27
Comment
Figure 20.27
Figure 20.27
Figure 20.27
Figure 20.27
Figure 20.27